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After building native binaries of version 8 from source, running tezos-node gives me:

Illegal instruction (core dumped)

Since Rust is the new requirement for v8, I thought that maybe the Rust compiler was generating binaries with instructions that my CPU did not support so I changed the target CPU to something that would be less featureful.

In install_build_deps.rust.sh, I tried target-cpu=native, target-cpu=athlon, target-cpu=x86-64

RUSTFLAGS='-C target-feature=-crt-static -C target-cpu=native' cargo build --release --manifest-path rust/Cargo.toml

But it didn't help.

Maybe the OCaml compiler is at fault but I don't know how to set the target arch for OCaml.

Here are my processor details.

processor   : 0
vendor_id   : AuthenticAMD
cpu family  : 16
model       : 10
model name  : AMD Phenom(tm) II X6 1090T Processor
stepping    : 0
microcode   : 0x10000bf
cpu MHz     : 802.603
cache size  : 512 KB
physical id : 0
siblings    : 6
core id     : 0
cpu cores   : 6
apicid      : 0
initial apicid  : 0
fpu     : yes
fpu_exception   : yes
cpuid level : 6
wp      : yes
flags       : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush mmx fxsr sse sse2 ht syscall nx mmxext fxsr_opt pdpe1gb rdtscp lm 3dnowext 3dnow constant_tsc rep_good nopl nonstop_tsc cpuid extd_apicid aperfmperf pni monitor cx16 popcnt lahf_lm cmp_legacy svm extapic cr8_legacy abm sse4a misalignsse 3dnowprefetch osvw ibs skinit wdt nodeid_msr cpb hw_pstate vmmcall npt lbrv svm_lock nrip_save pausefilter
bugs        : tlb_mmatch apic_c1e fxsave_leak sysret_ss_attrs null_seg amd_e400 spectre_v1 spectre_v2
bogomips    : 6421.41
TLB size    : 1024 4K pages
clflush size    : 64
cache_alignment : 64
address sizes   : 48 bits physical, 48 bits virtual
power management: ts ttp tm stc 100mhzsteps hwpstate cpb
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